OFD=RUN, SWRESET=NOT_IN_RESET, RTC1KHZ_EN=DISABLE, ALARM1HZ=NO_MATCH, WAKEDPD_EN=DISABLE, WAKE1KHZ=RUN, RTC_EN=DISABLE, ALARMDPD_EN=DISABLE
RTC control register
| SWRESET | Software reset control 0 (NOT_IN_RESET): Not in reset. The RTC is not held in reset. This bit must be cleared prior to configuring or initiating any operation of the RTC. 1 (IN_RESET): In reset. The RTC is held in reset. All register bits within the RTC will be forced to their reset value except the OFD bit. This bit must be cleared before writing to any register in the RTC - including writes to set any of the other bits within this register. Do not attempt to write to any bits of this register at the same time that the reset bit is being cleared. This bit may also serve as a Power Fail Detect flag for the always-on voltage domain. |
| OFD | Oscillator fail detect status. 0 (RUN): Run. The RTC oscillator is running properly. Writing a 0 has no effect. 1 (FAIL): Fail. RTC oscillator fail detected. Clear this flag after the following power-up. Writing a 1 clears this bit. |
| ALARM1HZ | RTC 1 Hz timer alarm flag status. 0 (NO_MATCH): No match. No match has occurred on the 1 Hz RTC timer. Writing a 0 has no effect. 1 (MATCH): Match. A match condition has occurred on the 1 Hz RTC timer. This flag generates an RTC alarm interrupt request RTC_ALARM which can also wake up the part from any low power mode. Writing a 1 clears this bit. |
| WAKE1KHZ | RTC 1 kHz timer wake-up flag status. 0 (RUN): Run. The RTC 1 kHz timer is running. Writing a 0 has no effect. 1 (TIME_OUT): Time-out. The 1 kHz high-resolution/wake-up timer has timed out. This flag generates an RTC wake-up interrupt request RTC-WAKE which can also wake up the part from any low power mode. Writing a 1 clears this bit. |
| ALARMDPD_EN | RTC 1 Hz timer alarm enable for Deep power-down. 0 (DISABLE): Disable. A match on the 1 Hz RTC timer will not bring the part out of Deep power-down mode. 1 (ENABLE): Enable. A match on the 1 Hz RTC timer bring the part out of Deep power-down mode. |
| WAKEDPD_EN | RTC 1 kHz timer wake-up enable for Deep power-down. 0 (DISABLE): Disable. A match on the 1 kHz RTC timer will not bring the part out of Deep power-down mode. 1 (ENABLE): Enable. A match on the 1 kHz RTC timer bring the part out of Deep power-down mode. |
| RTC1KHZ_EN | RTC 1 kHz clock enable. This bit can be set to 0 to conserve power if the 1 kHz timer is not used. This bit has no effect when the RTC is disabled (bit 7 of this register is 0). 0 (DISABLE): Disable. A match on the 1 kHz RTC timer will not bring the part out of Deep power-down mode. 1 (ENABLE): Enable. The 1 kHz RTC timer is enabled. |
| RTC_EN | RTC enable. 0 (DISABLE): Disable. The RTC 1 Hz and 1 kHz clocks are shut down and the RTC operation is disabled. This bit should be 0 when writing to load a value in the RTC counter register. 1 (ENABLE): Enable. The 1 Hz RTC clock is running and RTC operation is enabled. You must set this bit to initiate operation of the RTC. The first clock to the RTC counter occurs 1 s after this bit is set. To also enable the high-resolution, 1 kHz clock, set bit 6 in this register. |
| RESERVED | Reserved |